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 NMF3000, NMF3010 Dual-Stage, Differential Lines Filter with ESD Protection
The NMF3000 and the NMF3010 are a dual-stage, differential line ESD and filtering protection scheme for input signals into portable devices. The NMF3000 is the first stage and is located at or very near to the interface to the outside world. It provides the high-level ESD protection as well as the initial filtering of incoming audio signals. The NMF3010 is the second stage and provides additional signal filtering. This second stage can be placed some distance away from the first stage to allow for effective filtering across extended distances.
A1
http://onsemi.com MARKING DIAGRAMS
A1
Features
* Dual Filtering Lines for 2-Channels or Differential Transmission * Separate Power and Analog Grounds for ESD Protection and * VCC Input Pin on First Stage to Set Microphone DC Bias * IEC 61000-4-2 Grade 15 kV Contact ESD Protection on the Inputs, * IEC 61000-4-2 Level 1 ESD protection on All Other Pin-to-Pin *
Combinations These are Pb-Free Devices* VCC, and Between Power and Analog Grounds Filtering Circuitry
9 Bump Flip-Chip CASE 499AE
A1 6 Bump Flip-Chip CASE 499AF A L Y W
A1
= Assembly Location = Wafer Lot = Year = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet.
VCC NMF3000FCT1G NMF3010FCT1G
Microphone Incoming Audio Signals C 1st Stage C 2nd Stage Audio Amplifier
Figure 1. System Diagram
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2004
1
March, 2004 - Rev. 1
Publication Order Number: NMF3000/D
EE EE
C C
NMF 3000 ALYW
NIO ALYW
NMF3000, NMF3010
FUNCTIONAL BLOCK DIAGRAMS
VCC +15 kV Contact ESD Protection PGND
LOW PASS FILTERING
IN OUT
+15 kV Contact ESD Protection
IEC Level 1 Contact ESD Protection
PGND
+15 kV Contact ESD Protection
AGND
PGND
Figure 2. First Stage: NMF3000FCT1G
LOW PASS FILTERING
IN OUT
+15 kV Contact ESD Protection
IEC Level 1 Contact ESD Protection
PGND
+15 kV Contact ESD Protection
AGND
PGND
Figure 3. Second Stage: NMF3010FCT1G
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2
NMF3000, NMF3010
PINOUTS AND PIN DESCRIPTIONS
A1 Markers
1
2
3
A
OP
Vcc
IP
IP
Vcc
OP
B
PGND
PGND
PGND
PGND
PGND
PGND
C
ON
AGND
IN
IN
AGND
ON
Top View Bumps Down
Bottom View Bumps Up
Figure 4. Pinout Diagrams for First Stage: NMF3000FCT1G
PINOUT FUNCTIONS FOR FIRST STAGE
Pin A1 A2 A3 B1, B2, B3 C1 C2 C3 Type Output P VCC Input P PGND Output N AGND Input N Positive Side Signal Output DC Power Connection Positive Side Signal Input Power Ground Negative Side Signal Output Analog Ground Negative Side Signal Input Description
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3
NMF3000, NMF3010
PINOUTS AND PIN DESCRIPTIONS
A1 Markers
1
2
3
A
OP
PGND
IP
IP
PGND
OP
B
ON
AGND
IN
IN
AGND
ON
Top View Bumps Down
Bottom View Bumps Up
Figure 5. Pinout Diagrams for Second Stage: NMF3010FCT1G
PINOUT FUNCTIONS FOR SECOND STAGE
Pin A1 A2 A3 B1 B2 B3 Type Output P PGND Input P Output N AGND Input N Positive Side Signal Output Power Ground Positive Side Signal Input Negative Side Signal Output Analog Ground Negative Side Signal Input Description
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4
NMF3000, NMF3010
MAXIMUM RATINGS
Rating Operating Ambient Temperature Range Moisture Sensitivity Storage Temperature Range Supply Voltage Symbol TA MSL Tstg VCC Value -40 to 85 Level 1 -55 to 150 0 to 11 C V Units C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS (VCC = 0 V to 10 V, TA = -40C to 85C, All Typical Values Measured at 25C)
Parameter Supply Voltage Attenuation Attenuation B2B Diode Breakdown Voltage Standoff Voltage Leakage Current Power Dissipation NMF3000FCT1G DC Series Resistance NMF3010FCT1G DC Series Resistance Input Capacitance per Line Bias Resistance per Line Crosstalk Noise Distortion Input to output on first stage Input to output on second stage f = 1.0 MHz, for each stage when capacitor has 2.0 V across its terminals. First Stage Only 50 W Source and Load Idle-channel or Self-noise of the Network Anywhere in the Bandwidth 20 Hz to 20 kHz RI/O RI/O CLINE RBIAS1 CT 997 950 900 950 -25 6.0 0.01 1050 1000 1000 1000 V = VRM, for each stage First stage only @ 800 MHz, 50 W Environment @ 1.9 GHz, 50 W Environment IR = 1.0 mA, Pin to PGND, AGND to PGND B2B BV VRM IRM Conditions Symbol VCC Min 0 52 52 12 10 500 100 1103 1050 1100 1050 95 70 Typ Max 10 Units V dB dB V V nA mW W W pF W dB nV/Hz %
1. Specifications apply to devices as a pair, as shown in the system diagram, unless otherwise noted as `for each stage'.
ESD CHARACTERISTICS
Pin NMF3000FCT1G: A2, C2, A3, C3 to PGND NMF3010FCT1G: B2, B3, A3 to PGND NMF3000FCT1G: A2, C2, A3, C3 to PGND NMF3010FCT1G: B2, B3, A3 to PGND NMF3000FCT1G: All Pins Pairwise NMF3010FCT1G: All Pins Pairwise NMF3000FCT1G: All Pins Pairwise NMF3010FCT1G: All Pins Pairwise Level 4+ IEC 61000-4-2 4 IEC 61000-4-2 1 IEC 61000-4-2 1 IEC 61000-4-2 Type Contact Air Contact Air Min 15 15 2.0 2.0 Units kV kV kV kV
COMPONENT MATCHING
Component Resistors Capacitors Description Amount of Relative Variation between Symmetrical Resistors / Capacitors on the same Device Max 2.0 2.0 Unit % %
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5
NMF3000, NMF3010
-70 dB @ 1.9 GHz
-95 dB @ 800 MHz
Figure 6. Typical S21 of NMF3000FCT1G & NMF3010FCT1G in a 50 W Environment 2 Lines = Positive and Negative Sides
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6
NMF3000, NMF3010
DAISY CHAIN SPECIFICATIONS
1.5 mm 3 2 1
A
B Trace Width: 30 mm 500 mm
C
Bottom View Bumps Up Figure 7. First Stage: NMF3000FCT1G
1.5 mm 3 2 1
A Trace Width: 30 mm 1.0 mm B 500 mm
Bottom View Bumps Up Figure 8. Second Stage: NMF3010FCT1G
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7
1.5 mm
NMF3000, NMF3010
DEVICE ORDERING INFORMATION
Device Order Number NMF3000FCT1G NMF3010FCT1G ENGTDDSY3x3FCT1G ENGTDDSY2x3FCT1G Package Type 9-Bump Flip-Chip 6-Bump Flip-Chip 9-Bump Flip-Chip 6-Bump Flip-Chip Shipping 3000 / Tape and Reel 3000 / Tape and Reel 500 / Tape and Reel 500 / Tape and Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
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8
NMF3000, NMF3010
PACKAGE DIMENSIONS
4X
A D B
FLIP-CHIP-9 CASE 499AE ISSUE A
TERMINAL A1 LOCATOR
0.10 C 0.05 C A2 A1 SIDE VIEW
C B
A 9X
b
0.05 C A B 0.03 C BOTTOM VIEW
4X
0.10 C
TERMINAL A1 LOCATOR
0.10 C A 0.05 C SIDE VIEW
6X
b
0.05 C A B 0.03 C
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
EE
TOP VIEW A2 A1 C
e
B A 1 2 3
BOTTOM VIEW
C
TOP VIEW D1 e e
1 2 3
0.10 C
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. DIM A A1 A2 D E b e D1 E1 MILLIMETERS MIN MAX --- 0.700 0.210 0.270 0.380 0.430 1.489 BSC 1.489 BSC 0.290 0.340 0.500 BSC 1.000 BSC 1.000 BSC
E
A C
SEATING PLANE
E1
D
A
B
FLIP-CHIP-6 CASE 499AF ISSUE A
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. MILLIMETERS DIM MIN MAX A --- 0.700 A1 0.210 0.270 A2 0.380 0.430 D 1.489 BSC E 0.989 BSC b 0.290 0.340 e 0.500 BSC D1 1.000 BSC
E
SEATING PLANE
D1
e
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9
NMF3000, NMF3010
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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10
NMF3000/D


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